Publikációk
] Szűrők: Szerző = András Pataricza [Minden szűrő visszaállítása]
Mathematical Model Transformation for System Verification,
: Budapest University of Technology and Economics, Dept. of Measurement and Information Systems, June, 2000.
Abstract
"Concurrent Error Detection of Program Execution Based on Statechart Specification",
Proc. 10th European Workshop on Dependable Computing (EWDC-10): Österreichische Computer Gesellschaft, pp. 181 - 185, 1999.
"Hardware Accelerators for Petri-net Analysis",
Proc. Austrian-Hungarian Workshop on Distributed and Parallel Systems (DAPSYS'98): University of Vienna, Department of Applied Computer Science, pp. 99 - 104, 1998.
"Reachability Analysis of Petri-nets by FPGA Based Accelerators",
Proc. Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS'98), pp. 307 - 312, 1998.
"Multiprocessor Checking Using Watchdog Processors",
COMPUTER SYSTEMS SCIENCE AND ENGINEERING, vol. 11, issue 5, pp. 301 - 310, 1996.
Abstract
"Control Flow Checking in Multitasking Systems",
PERIODICA POLYTECHNICA-ELECTRICAL ENGINEERING, vol. 39, issue 1, pp. 27 - 36, 1995.
"Hierarchical Checking of Multiprocessors Using Watchdog Processors",
Dependable Computing - EDCC-1, Berlin ; Heidelberg, Springer-Verlag, pp. 386 - 403, 1994.
"A High-Speed Watchdog Processor for Multitasking Systems",
Proc. Eighth Symposium on Microcomputer and Microprocessor Applications (uP'94): HTE, pp. 65 - 74, 1994.
"Többprocesszoros rendszerek ellenőrzése watchdog processzorok felhasználásával",
XIV. Tudományos Ülésszak, Kandó Kálmán Műszaki Főiskola, pp. - , 1994.
"Watchdog Processors in Parallel Systems",
MICROPROCESSING AND MICROPROGRAMMING, vol. 39, issue 2-5, pp. 69 - 74, 1993.
Abstract
